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Duetohighdemand,the5micronconstantinterdigitatedchannellengthtestchips(S411)arecurrentlyoutofstock.Pleasecontactusformoredetailsontheexpectedreturndate.
ossila"snewrangeofrobustandreusableplatinumtestchipsaredesignedtosaveyoutimeandmoney.
TheOFETswerepatternedviaphotolithography,meaningverynarrowchannellengthsareacheivable.
Theplatinumissputteredontoatitaniumadhesionlayertoprovidean extremelyrobustcontactandchannelallowingittowithstandcleaningproceduressuchassolventsonication,plasmaetching,and swabbing.Thisallowsthetestchipstobereusedmultipletimesfortestingvariousmaterialssavingasignificantamountoftimeandmoney.
NOTE:Patterningusingphotolithographyleavesexposededgesofthetitaniumadhesionlayer.Theconsequenceofthisisthatchargeinjectionintothesemiconductinglayercanoccurfromtheadhesionlayerboundaryinsteadoftheplatinum.Thereforethesedevicesarerecommendforsingle-crystalorsingle-flakematerialsthatcansitontopoftheelectrodeandspantheelectrodegap.
Mobilityscreeningismadequickandsimplewithourprefabricatedhighdensitytestchips,bydepositingyoursemiconductordirectlyontothesurfaceyoucancreate upto20OFETsonasinglechip.Inadditionwhenusingour high-densityOFETtestboard youcantestanentirechipinaslittleas3minutesreducingtheoveralltimeofbothfabricationandmeasurement.
| Productcode | Channelgeometry | Channelwidth | Channellength | Electrodepairs | Quantity | Price |
| S403A1 | Linear | 1mm | 2-10μmVariable | 20 | 1 | £83 |
| S403A2 | Linear | 1mm | 4-10μmVariable | 16(minimum) | 1 | £50 |
| S411 | Interdigitated | 26.6mm | 5μm | 20 | 1 | £83 |
UserManual
Specifications
| Substrate/Gate | Silicon(p-doped) |
| Gatedielectric | 300nmthermallygrownsilicondioxide |
| Source-Drainelectrodes | Platinum(100nm)/Titaniumadhesionlayer(5nm) |
| Depostionmethod | Plasmasputtering |
| Patterningmethod | Photolithography |
Applications
OssilaHighDensitySubstratesfeatureupto20OFETswhichcanbenefityourresearchinanumberofways.Firstly,productioncostisreducedasaresultofahighervolumeofOFETspersubstratecomparedtothelowdensityequivalents.ThiscanhelptostretchyourbudgettoallowyoutoproduceandtestlargernumbersofOFETs.
Secondly,producingOFETsisafarfasterandlesslaboriousprocess.Fabricationtimeisreducedbyupto50%whenusingprefabricatedhighdensityOFETs,freeingupmoretimetotestthedevices.Asaresultofthis,greatervolumesofstatisticscanbeproducedwhichinturncanprovidemorerobustandreliableresearch.
FurThermore,OFETvariABIlityisreducedsincealargernumberofOFETsareproducedwitheachfabrication.AtOssilawehaveoptimisedthefabricationprocessinordertoproduceconsistentlyhighqualitysubstrates.Inthisrespect,usingourprefabricatedsubstratesratherthanfabricatingyourowncanhelpyoutogathermorereliabledatatobenefityourresearchproject.
Prefabricatedhighdensitysubstratesareidealformobilitytestingastheyenableswift,efficienttestingofhighvolumesofOFETs.TheOssilahigh-densityOFETtestboardhasbeendesignedforthispurpose.
RatherthanusingamechanicalprobestationtotestOFETs,whichisadelicateandtime-consumingprocess,thehighdensitytestboardallowstestingofmultipleOFETsatonetime;simplydropthesubstrateintothetestslot,securethepush-fitlidandconnecttheboardviaitsBNCconnectorstoanarrayoftestequipment.
Theboardhasbeenintelligentlydesignedtoreduceexternalnoise,leakagecurrentandstraycapacitanceinordertoprovidereliableandpreciselow-currenttesting.

Specifications
Wefabricateourplatinumtestchipsfromp-dopedsiliconsubstrates.Aninsulating300nmsiliconoxidegatedielectricisfirstgrownonbothsidesofthesilicon.Thesourceanddraincontactsconsistofa5nmtitaniumadhesionlayer below 100 nmofplatinum.Aplatinumgatecontactisalsodepositedalongoneedgeofeachsubstrate.
Itisessentialthatthereisanelectricalconnectionbetweenthegatecontactandthep-dopedsilicononthesubstratesides.Whenthesubstratesarediced,aweakelectricalconnectionisformed,howeverthiscanbeeasilyremovedwhencleaningthesubstrate.Werecommendapplyingsilver(conductive)paintalongandaroundthegatecontactedgesothatamorerobustconnectionismade withthesubstrateedge.
Forindividualdetailsanddimensiondrawingsofeachsubstratetypesee below.
Linearvariablechannellengthsubstrates(S403&S404)
| Geometry | Linear |
| Arrangement(S403) | 20electrodepairs,5channelwidths |
| Arrangement(S404) | 16electrodepairsminimum,4channelwidthsminimum* |
| Channelwidth | 1mm |
| Channellengths | 2(S403A1only),4,6,8,and10µm |

Interdigitated22.6mmx5µm constantchannellengthsubstrate(S411)
| Geometry | Interdigitated |
| Arrangement | 20identicalOFETs |
| Channelwidth | 22.6mm |
| Channellength | 5µm |

Tothebestofourknowledgethetechnicalinformationprovidedhereisaccurate.However,Ossilaassumenoliabilityfortheaccuracyofthisinformation.Thevaluesprovidedherearetypicalatthetimeofmanufactureandmayvaryovertimeandfrombatchtobatch.
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