Ossila/铂OFET测试芯片(高密度)/2微米可变(每个)/S403A1

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¥1660.00
货号:S403A1
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品牌:Ossila
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商品描述

Duetohighdemand,the5micronconstantinterdigitatedchannellengthtestchips(S411)arecurrentlyoutofstock.Pleasecontactusformoredetailsontheexpectedreturndate.

ossila"snewrangeofrobustandreusableplatinumtestchipsaredesignedtosaveyoutimeandmoney.

TheOFETswerepatternedviaphotolithography,meaningverynarrowchannellengthsareacheivable.

Theplatinumissputteredontoatitaniumadhesionlayertoprovidean extremelyrobustcontactandchannelallowingittowithstandcleaningproceduressuchassolventsonication,plasmaetching,and swabbing.Thisallowsthetestchipstobereusedmultipletimesfortestingvariousmaterialssavingasignificantamountoftimeandmoney. 

NOTE:Patterningusingphotolithographyleavesexposededgesofthetitaniumadhesionlayer.Theconsequenceofthisisthatchargeinjectionintothesemiconductinglayercanoccurfromtheadhesionlayerboundaryinsteadoftheplatinum.Thereforethesedevicesarerecommendforsingle-crystalorsingle-flakematerialsthatcansitontopoftheelectrodeandspantheelectrodegap.

Mobilityscreeningismadequickandsimplewithourprefabricatedhighdensitytestchips,bydepositingyoursemiconductordirectlyontothesurfaceyoucancreate upto20OFETsonasinglechip.Inadditionwhenusingour high-densityOFETtestboard youcantestanentirechipinaslittleas3minutesreducingtheoveralltimeofbothfabricationandmeasurement.

 

ProductcodeChannelgeometryChannelwidthChannellengthElectrodepairsQuantityPrice
S403A1Linear1mm2-10μmVariable201£83
S403A2Linear1mm4-10μmVariable16(minimum)1£50
S411Interdigitated26.6mm5μm201£83

 


UserManualUser Manual

Specifications

Substrate/GateSilicon(p-doped)
Gatedielectric300nmthermallygrownsilicondioxide
Source-DrainelectrodesPlatinum(100nm)/Titaniumadhesionlayer(5nm)
DepostionmethodPlasmasputtering
PatterningmethodPhotolithography

 

Applications

OssilaHighDensitySubstratesfeatureupto20OFETswhichcanbenefityourresearchinanumberofways.Firstly,productioncostisreducedasaresultofahighervolumeofOFETspersubstratecomparedtothelowdensityequivalents.ThiscanhelptostretchyourbudgettoallowyoutoproduceandtestlargernumbersofOFETs.

Secondly,producingOFETsisafarfasterandlesslaboriousprocess.Fabricationtimeisreducedbyupto50%whenusingprefabricatedhighdensityOFETs,freeingupmoretimetotestthedevices.Asaresultofthis,greatervolumesofstatisticscanbeproducedwhichinturncanprovidemorerobustandreliableresearch.

FurThermore,OFETvariABIlityisreducedsincealargernumberofOFETsareproducedwitheachfabrication.AtOssilawehaveoptimisedthefabricationprocessinordertoproduceconsistentlyhighqualitysubstrates.Inthisrespect,usingourprefabricatedsubstratesratherthanfabricatingyourowncanhelpyoutogathermorereliabledatatobenefityourresearchproject.

Prefabricatedhighdensitysubstratesareidealformobilitytestingastheyenableswift,efficienttestingofhighvolumesofOFETs.TheOssilahigh-densityOFETtestboardhasbeendesignedforthispurpose. 

RatherthanusingamechanicalprobestationtotestOFETs,whichisadelicateandtime-consumingprocess,thehighdensitytestboardallowstestingofmultipleOFETsatonetime;simplydropthesubstrateintothetestslot,securethepush-fitlidandconnecttheboardviaitsBNCconnectorstoanarrayoftestequipment.

Theboardhasbeenintelligentlydesignedtoreduceexternalnoise,leakagecurrentandstraycapacitanceinordertoprovidereliableandpreciselow-currenttesting.

 

High density FET mobility test board
TheOssilaHighDensityOFETTestBoard,designedforrapid,reliabletestingofmultipleOFETs.

 

Specifications

Wefabricateourplatinumtestchipsfromp-dopedsiliconsubstrates.Aninsulating300nmsiliconoxidegatedielectricisfirstgrownonbothsidesofthesilicon.Thesourceanddraincontactsconsistofa5nmtitaniumadhesionlayer below 100 nmofplatinum.Aplatinumgatecontactisalsodepositedalongoneedgeofeachsubstrate.

Itisessentialthatthereisanelectricalconnectionbetweenthegatecontactandthep-dopedsilicononthesubstratesides.Whenthesubstratesarediced,aweakelectricalconnectionisformed,howeverthiscanbeeasilyremovedwhencleaningthesubstrate.Werecommendapplyingsilver(conductive)paintalongandaroundthegatecontactedgesothatamorerobustconnectionismade withthesubstrateedge.S403 platinum test chip

Structureofprefabricatedsilicon/siliconoxidesubstrates.

 

Forindividualdetailsanddimensiondrawingsofeachsubstratetypesee below.

 

Linearvariablechannellengthsubstrates(S403&S404)

GeometryLinear
Arrangement(S403)20electrodepairs,5channelwidths
Arrangement(S404)16electrodepairsminimum,4channelwidthsminimum*
Channelwidth1mm
Channellengths2(S403A1only),4,6,8,and10µm
*PleasenotethatthefabricationandlayoutofS403andS404isidentical,howeveroneormoreofthe2 µmchannels isnotfullyresolvedontheS404substrates.Allfour 2 µmchannelsarepresentontheS403substrates.

 

  

Interdigitated22.6mmx5µm constantchannellengthsubstrate(S411)

GeometryInterdigitated
Arrangement20identicalOFETs
Channelwidth22.6mm
Channellength5µm
interdigitated 50 micron channel HD FET schematic
Dimensiondrawingofoneofthe22.6mmx5µmdevicesonthehighdensitysubstrate.

 

Tothebestofourknowledgethetechnicalinformationprovidedhereisaccurate.However,Ossilaassumenoliabilityfortheaccuracyofthisinformation.Thevaluesprovidedherearetypicalatthetimeofmanufactureandmayvaryovertimeandfrombatchtobatch.

 

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